1. Field of the Invention
The present invention relates to a method for deleting data from a NAND-type nonvolatile memory in a nonvolatile semiconductor memory device. In particular, the present invention relates to a method for deleting data from a NAND-type nonvolatile memory in a nonvolatile semiconductor memory device, the data of which is electrically rewritable and erasable (a nonvolatile memory or an EEPROM (Electrically Erasable and Programmable Read Only Memory)). The nonvolatile semiconductor memory device includes, for example, EEPROMs, flash memories, and the like, the data of which is electrically erasable per bit.
2. Description of the Related Art
The market of nonvolatile memories, the data of which is electrically rewritable and can be retained even after the power is turned off, has been expanding. A nonvolatile memory is similar in structure to a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), and has a region capable of accumulating electric charges for a long time, over a channel formation region. Since such a charge accumulating region is formed on an insulating layer and electrically insulated from surrounding regions, the charge accumulating region is also called a floating gate. A control gate is provided over the floating gate with an insulating layer interposed therebetween.
In a so-called floating-gate nonvolatile memory having the above structure, charges are accumulated in or released from the floating gate by a voltage applied to the control gate. That is, by injecting or releasing charges into/from the floating gate, data can be stored in or deleted from the memory. Specifically, the injection and releasing of charges into/from the floating gate are conducted by applying a high voltage between the channel formation region of a semiconductor substrate and the control gate. At this time, it is considered that Fowler-Nordheim (F-N) tunnel current or thermoelectrons flow through the insulating layer on the channel formation region. Therefore, the insulating layer is also called a tunnel insulating layer.
The floating-gate nonvolatile memory is required to have a characteristic that the memory can retain charges stored in the floating gate for at least 10 years in order to ensure reliability. Therefore, the tunnel insulating layer is required to have a thickness enough for tunnel current to flow there through and also have a high insulating property so that charges will not leak from the layer.
The floating gate which is formed on the tunnel insulating layer is made from silicon, which is the same semiconductor material as that of the semiconductor which forms the channel formation region. For example, a method of forming a floating gate using polysilicon is widely known, and for example, a polysilicon film which is formed to a thickness of 400 nm is known (see Reference 1: Japanese Published Patent Application No. 2000-58685.
A nonvolatile memory having such a floating gate (hereinafter also referred to as a charge accumulating layer in this specification), the data of which is rewritable by injecting or releasing charges into/from the charge accumulating layer, is called an EEPROM. In addition, the operation of releasing charges which have once been injected into the charge accumulating layer of the nonvolatile memory is called an operation of deleting data from the nonvolatile memory. A nonvolatile memory, which employs a bulk deletion method where data is electrically deleted all at once by releasing charges of the charge accumulating layers of all nonvolatile memory elements in one memory cell, is called a flash memory.
Typical cell structures of a nonvolatile memory which is a flash memory are categorized as a NOR-type nonvolatile memory or a NAND-type nonvolatile memory. Both the nonvolatile memories employ the bulk deletion operation. FIG. 30 shows an exemplary structure of a general NAND-type nonvolatile memory. In FIG. 30, an n-type single crystalline silicon substrate is used for the substrate, and a p well 3001 of a peripheral circuit portion (also called a logic portion) and a p well 3002 of a memory cell (also called a nonvolatile memory element portion) are formed separately.
Accordingly, when conducting the bulk deletion operation for the nonvolatile memory, the control gates of all nonvolatile memory elements are set at the same potential, and a positive voltage which is higher than the voltage of the control gates is applied to the p-well terminal of the memory cell until charges of the floating gates are sufficiently released.